1. Field of the Invention
The present invention generally relates to active matrix liquid crystal display devices, and more particularly to a configuration in which counter electrodes face pixel electrodes with a liquid crystal layer therebetween.
2. Description of the Related Art
Typically, a liquid crystal display device includes a TFT array substrate 54, as shown in FIG. 5, having thin film transistors and pixel electrodes, and a counter electrode substrate 56, as shown in FIG. 6, having counter electrodes facing the pixel electrodes, with a liquid crystal layer (not shown) being held therebetween.
The TFT array substrate 54 includes a plurality of gate lines 51, a plurality of data lines 52, a plurality of thin film transistors 53 formed in the vicinity of intersections of the gate lines 51 and the data lines 52, and pixel electrodes 57 individually connected to the plurality of thin film transistors 53.
On the other hand, the counter electrode substrate 56 facing the TFT array substrate 54 simply includes a single counter electrode 55 common to all the pixel electrodes 57.
A signal voltage from the data lines 52 is applied to the pixel electrodes 57 formed on the TFT array substrate 54 via the thin film transistors 53. A power supply 59 is connected to the counter electrode 55 formed on the counter electrode substrate 56 through a plurality of connector terminals 58. Although two connector terminals 58 are shown in FIG. 5, at least one connector terminal 58 is required, and the connector terminal 58 may be disposed at any location. This allows a liquid crystal layer (not shown) to be driven by using a voltage difference between the pixel electrodes 57 and the common electrode 55.
In the above-mentioned liquid crystal display device, a voltage applied to the counter electrode 55 is selected to be VO so that positive voltages and negative voltages are applied to the liquid crystal layer in a symmetric manner, as illustrated in FIG. 7, in order to avoid a flicker or display failure which results from the sticking phenomenon (image retention) when the liquid crystal display device is driven.
Recently, the demand for such a liquid crystal display device with high definition display has been increasing. As a result, the number of intersections between the gate lines 51 and the data lines 52, and the number of thin film transistors 53 connected to the gate lines 51 are drastically being increased. The gate lines 51 exhibit parasitic capacitance at locations such as at the intersections with the data lines 52 and the gate electrodes of the thin film transistors 53 in the vicinity of the intersections.
Therefore, as the desire for higher definition display increases, such capacitance in the gate lines 51 is increased, thus increasing signal delay in the gate lines 51.
When a signal delay occurs in the gate lines 51, the signal waveform of the gate electrodes becomes rounded, and the thin film transistors 53 suffer from the leakage of charge at the timing when they are turned off.
The leakage of charge at the thin film transistors 53 is greater at portions further from gate signal sources. Hence, the further the thin film transistors are from the gate signal sources, the greater the leakage becomes.
Accordingly, the amount of variation in voltage applied to the pixel electrodes 57, which depends upon the leakage of charge at the thin film transistors 53, is also increased at portions of the gate lines 51 that are further from the gate signal sources. Portions 51a, 51b, 51c, 51d, and 51e of each of the gate lines 51 shown in FIG. 5 extend further from the gate signal source, in the order stated.
When the amount of variation in voltage applied to the pixel electrodes 57 differs depending upon a distance in the gate lines 51 from the gate signal sources, voltages applied to the liquid crystal layer, as indicated by B1 to B5 in FIG. 8, are increased at portions of the gate lines 51 that are further from the gate signal sources in a manner such that |B1a| to |B1b|), . . . , (|B5a| to |B5b|). Thus, the applied voltage has less symmetrical polarity.
Less symmetrical polarity may result in problems of flicker or display failure which results from the sticking phenomenon.
Accordingly, it is an object of the present invention to provide an active matrix liquid crystal display device in which no flicker or sticking of images occurs on a display screen when a signal delay in gate lines causes voltages applied to pixels at portions of the gate lines that are closer to and further from signal sources to differ.
To this end, the present invention provides an active matrix liquid crystal display device including a pair of substrates facing each other with a liquid crystal layer held therebetween. On a surface of one of the substrates adjacent to the liquid crystal layer, there are formed a plurality of gate lines and a plurality of data lines intersecting to form a matrix; thin film transistors in the vicinity of intersections of the gate lines and the data lines, the thin film transistors having gate electrodes connected to the gate lines and source electrodes connected to the data lines; and pixel electrodes connected to the drain electrodes of the thin film transistors. On a surface of the other substrate adjacent to the liquid crystal layer, there are formed a plurality of counter electrodes in the direction perpendicular to the gate lines on the one substrate. Each of the counter electrodes faces at least one column of the pixel electrodes.
Therefore, a voltage is applied at different magnitudes to the plurality of counter electrodes depending upon a distance in the gate lines from signal sources. This prevents a flicker or sticking of images from occurring on a display screen when the amount of variation in voltages applied to the pixel electrodes at portions of the gate lines that are closer to and further from the signal sources differs.
Preferably, the plurality of counter electrodes are connected to power supplies for supplying different voltages, so that the voltages applied to the counter electrodes may be independently set.
Preferably, the plurality of counter electrodes are respectively connected to a plurality of output terminals of a voltage controller connected to a signal power supply to generate different magnitudes of voltage, so that the number of power supplies required may be reduced.